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Press Releases
Extreme DA – The Technology Leader in IC timing Analysis – Expands Executive Team
Press Release, August 23, 2010

Japan’s STARC Adopts Extreme GoldTime as Timing Tool in STARCAD-CEL (V4.0) Statistical IC Analysis Flow
Press Release, June 9, 2010

Altos and Extreme DA Team to Create Accurate Industry Standard CCS Noise Models
Press Release, June 9, 2010

Extreme DA Announces Donation of Kindle DX and Results of IC Design Survey Give-Away
Press Release, December 8, 2009

Japan’s STARC Adopts Extreme GoldTime as Timing Tool in STARCAD-CEL (V3.0) Statistical IC Analysis Flow
Press Release, July 23, 2009

TSMC Extends Design Methodology Leadership to 28nm with Reference Flow 10.0
Press Release, July 22, 2009

Extreme DA Declares Victory in Timing Analysis Performance / Capacity Race: Moves to Raise the Bar for Statistical Analysis
Press Release, July 20, 2009

Extreme DA GoldTime is Deployed into NVIDIA’s Design Flow for Full-chip SI Timing Analysis
Press Release, July 20, 2009




In The Press
An Easy Way to Adopt Statistical Timing Analysis and Do Better Designs
SOCCentral, January 21, 2010

User Benchmark of PrimeTime vs. GoldTime for STA
DeepChip ESNUG 479, February 5, 2009

‘Golden’ timing signoff – does it correlate to Spice?
SCDsource, December 7, 2008

Why we dumped PrimeTime (and skipped Cadence ETS) for GoldTime
DeepChip ESNUG 477, November 20, 2008

Test Structures Make Designs Harder to Verify
SOCcentral, October 28, 2008

Extreme DA strikes 'gold' with static timing optimization
An SCDsource interview at DAC 2008, July 17, 2008

EDA prepares for the multicore revolution
EE Times Europe, June 16, 2008

Commentary: Collaborative conundrum
EE Times, June 16, 2008

Multithreading threatens to unravel
beyond 45 nm
EE Times, June 16, 2008

Can compute-farms solve the parallel programming problem?
EE Times Europe, June 11, 2008

UMC, Extreme DA team on statistical timing
EE Times, June 9, 2008

Statistical timing analysis moves from interesting to necessary
EDN, June 6, 2008

 





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GoldTime by Extreme DA, is the new-generation timing analysis technology that delivers 5X better speed and capacity. With its new, from-the-ground-up architecture, designers can sign-off with certainty and achieve faster timing closure. Whether verifying a current generation design across corners or doing a statistical analysis (SSTA) to optimize the performance, power and yield for 28nm ICs, GoldTime delivers the answers while the competition is still figuring out the results.

"GoldTime is our static analysis and timing sign-off tool. Our total time to analyze our design in GoldTime was 1 hr, versus 8 hrs in PrimeTime. In addition, GoldTime memory usage maxed at 5.1 GB [versus 13.0 GB for PrimeTime]. GoldTime was efficient enough for us to debug design problems. PrimeTime wasn't."
— DeepChip ESNUG 479, Feb. 5, 2009

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